x86/AMD: work around erratum 793 for 32-bit The original change went into a 64-bit only code section, thus leaving the issue unfixed on 32-bit. Re-order code to address this. Signed-off-by: Jan Beulich Acked-by: Ian Campbell --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -522,6 +522,18 @@ static void __devinit init_amd(struct cp "*** Pass \"allow_unsafe\" if you're trusting" " all your (PV) guest kernels. ***\n"); + /* AMD CPUs do not support SYSENTER outside of legacy mode. */ + clear_bit(X86_FEATURE_SEP, c->x86_capability); + + if (c->x86 == 0x10) { + /* do this for boot cpu */ + if (c == &boot_cpu_data) + check_enable_amd_mmconf_dmi(); + + fam10h_check_enable_mmcfg(); + } +#endif + if (c->x86 == 0x16 && c->x86_model <= 0xf) { if (c == &boot_cpu_data) { l = pci_conf_read32(0, 0, 0x18, 0x3, 0x58); @@ -555,18 +567,6 @@ static void __devinit init_amd(struct cp } } - /* AMD CPUs do not support SYSENTER outside of legacy mode. */ - clear_bit(X86_FEATURE_SEP, c->x86_capability); - - if (c->x86 == 0x10) { - /* do this for boot cpu */ - if (c == &boot_cpu_data) - check_enable_amd_mmconf_dmi(); - - fam10h_check_enable_mmcfg(); - } -#endif - if (c->x86 == 0x10) { /* * On family 10h BIOS may not have properly enabled WC+